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Diffstat (limited to 'metadata/md5-cache/sci-electronics/iverilog-9999')
-rw-r--r--metadata/md5-cache/sci-electronics/iverilog-99994
1 files changed, 2 insertions, 2 deletions
diff --git a/metadata/md5-cache/sci-electronics/iverilog-9999 b/metadata/md5-cache/sci-electronics/iverilog-9999
index 11caa2062fc1..b07ddbcaeec3 100644
--- a/metadata/md5-cache/sci-electronics/iverilog-9999
+++ b/metadata/md5-cache/sci-electronics/iverilog-9999
@@ -1,4 +1,4 @@
-BDEPEND=dev-util/gperf sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4 >=dev-vcs/git-1.8.2.1[curl]
+BDEPEND=dev-util/gperf sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.2-r1:1.16 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4 >=dev-vcs/git-1.8.2.1[curl]
DEFINED_PHASES=install prepare unpack
DEPEND=sys-libs/readline:= sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
@@ -8,5 +8,5 @@ LICENSE=LGPL-2.1
PROPERTIES=live
RDEPEND=sys-libs/readline:= sys-libs/zlib
SLOT=0
-_eclasses_=autotools 3ec5e49b810b2571ca9c6d76f55867bb git-r3 3e7ec3d6619213460c85e2aa48398441 libtool f143db5a74ccd9ca28c1234deffede96 multilib d410501a125f99ffb560b0c523cd3d1e toolchain-funcs 1a94dc06d324bd0dab754e11abe6d27e
+_eclasses_=autotools 9677fc170e6d375dc41c14871b33d28c git-r3 3e7ec3d6619213460c85e2aa48398441 libtool f143db5a74ccd9ca28c1234deffede96 multilib d410501a125f99ffb560b0c523cd3d1e toolchain-funcs 1a94dc06d324bd0dab754e11abe6d27e
_md5_=53fe7f5f4565527a26b28a22c2a45c7c