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authorDavid Seifert <soap@gentoo.org>2017-11-25 17:48:47 +0100
committerDavid Seifert <soap@gentoo.org>2017-11-25 18:34:35 +0100
commit5d242c789b15af78b82671d075b8ce5d0579bb14 (patch)
tree112556471a84b0bdce225fc895df7d0878da1a82 /sci-electronics
parentsci-electronics/alliance: [QA] Consistent whitespace in metadata.xml (diff)
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sci-electronics/balsa: [QA] Consistent whitespace in metadata.xml
Diffstat (limited to 'sci-electronics')
-rw-r--r--sci-electronics/balsa/metadata.xml14
1 files changed, 7 insertions, 7 deletions
diff --git a/sci-electronics/balsa/metadata.xml b/sci-electronics/balsa/metadata.xml
index d547549944cb..8b31894ded35 100644
--- a/sci-electronics/balsa/metadata.xml
+++ b/sci-electronics/balsa/metadata.xml
@@ -6,11 +6,11 @@
<name>Gentoo Electronics Project</name>
</maintainer>
<longdescription>
- Balsa is an asynchronous circuit synthesis system developed over a number of
- years at the APT group of the School Of Computer Science, The University of
- Manchester. Balsa is built around the Handshake Circuits methology and can
- generate gate level netlists from high-level descriptions in the Balsa
- language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be
- generated.
- </longdescription>
+ Balsa is an asynchronous circuit synthesis system developed over a number of
+ years at the APT group of the School Of Computer Science, The University of
+ Manchester. Balsa is built around the Handshake Circuits methology and can
+ generate gate level netlists from high-level descriptions in the Balsa
+ language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be
+ generated.
+ </longdescription>
</pkgmetadata>