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Diffstat (limited to '0001-xen-arm-page-Handle-cache-flush-of-an-element-at-the.patch')
-rw-r--r--0001-xen-arm-page-Handle-cache-flush-of-an-element-at-the.patch4
1 files changed, 2 insertions, 2 deletions
diff --git a/0001-xen-arm-page-Handle-cache-flush-of-an-element-at-the.patch b/0001-xen-arm-page-Handle-cache-flush-of-an-element-at-the.patch
index 8da66a5..3988d89 100644
--- a/0001-xen-arm-page-Handle-cache-flush-of-an-element-at-the.patch
+++ b/0001-xen-arm-page-Handle-cache-flush-of-an-element-at-the.patch
@@ -1,7 +1,7 @@
From d720c2310a7ac8878c01fe9d9fdc13f43cb266b3 Mon Sep 17 00:00:00 2001
From: Stefano Stabellini <stefano.stabellini@amd.com>
Date: Tue, 5 Sep 2023 14:34:28 +0200
-Subject: [PATCH 01/27] xen/arm: page: Handle cache flush of an element at the
+Subject: [PATCH 01/30] xen/arm: page: Handle cache flush of an element at the
top of the address space
The region that needs to be cleaned/invalidated may be at the top
@@ -107,5 +107,5 @@ index c6f9fb0d4e..eff5883ef8 100644
dsb(sy); /* So we know the flushes happen before continuing */
/* ARM callers assume that dcache_* functions cannot fail. */
--
-2.42.0
+2.43.0