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* sim: mn10300/v850: drop unused WITH_CORE defineMike Frysinger2015-11-174-2/+8
* sim: always enable modulo memoryMike Frysinger2015-11-1712-36/+30
* [sim/ppc] Fix printf_filtered referencePedro Alves2015-11-172-16/+21
* sim: sim-close: use XCONCAT2 helperMike Frysinger2015-11-172-3/+6
* sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger2015-11-1644-56/+119
* sim: cr16: drop global callback stateMike Frysinger2015-11-154-62/+70
* sim: cr16: convert to common sim engine logicMike Frysinger2015-11-155-157/+96
* sim: cr16: convert to common sim memory modulesMike Frysinger2015-11-158-589/+62
* sim: cr16: push down sd/cpu varsMike Frysinger2015-11-156-788/+833
* sim: cr16: delete unused memory helpersMike Frysinger2015-11-153-20/+6
* sim: cr16: switch to common sim-regMike Frysinger2015-11-153-13/+61
* sim: cr16/d10v: drop redundant call to sim_create_inferiorMike Frysinger2015-11-154-2/+8
* sim: d10v: drop global callback stateMike Frysinger2015-11-154-137/+149
* sim: d10v: convert to common sim engine logicMike Frysinger2015-11-155-218/+137
* sim: d10v: push down sd/cpu varsMike Frysinger2015-11-156-500/+543
* sim: h8300: convert to common sim_{reason,stop}Mike Frysinger2015-11-153-15/+8
* sim: mcore: pull cpu state out of global scopeMike Frysinger2015-11-153-294/+309
* sim: mcore: switch to common sim-regMike Frysinger2015-11-153-4/+16
* sim: mcore: add a fail testcaseMike Frysinger2015-11-153-1/+14
* sim: mcore: convert to common reason/resume logicMike Frysinger2015-11-153-40/+64
* sim: clean up redundant objectsMike Frysinger2015-11-158-20/+19
* sim: sim-close: unify sim_close logicMike Frysinger2015-11-1550-171/+173
* sim: m32c: add a basic testsuiteMike Frysinger2015-11-155-0/+92
* sim: testsuite: support basic vars in flagsMike Frysinger2015-11-152-1/+12
* Update the RX simulator to handle the latest opcode types.Nick Clifton2015-11-102-1/+24
* sim: cr16/d10v: localize translation funcsMike Frysinger2015-11-104-6/+18
* sim: m32c: move test code to testsuiteMike Frysinger2015-11-108-26/+17
* sim: m32c: drop redundant dependency infoMike Frysinger2015-11-102-13/+4
* sim: h8300: drop unused littleendian variableMike Frysinger2015-11-102-13/+5
* sim: ft32: test coverage for link parameters and PM write portJames Bowman2015-10-122-0/+42
* sim: moxie: fix leakage in error path [BZ #18273]Mike Frysinger2015-10-112-0/+6
* sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]Mike Frysinger2015-10-114-1/+33
* sim: ft32: correct simulation of MEMCPY and MEMSETJames Bowman2015-09-292-2/+7
* sim: ft32: correctly simulate PM write portJames Bowman2015-09-292-2/+10
* [PATCH] Add micromips support to the MIPS simulatorAndrew Bennett2015-09-2522-1468/+7290
* sim: ft32: add character input portJames Bowman2015-09-222-0/+6
* Fix building GDB for the M32C by providing a stub sim_info function.Nick Clifton2015-08-052-0/+11
* Remove leading/trailing white spaces in ChangeLogH.J. Lu2015-07-2431-1219/+1219
* Remove extraneous whitespace from ARM sim sources.Nick Clifton2015-07-1429-320/+348
* Fix snafu with latest addition to the ARM sim.Nick Clifton2015-07-022-1/+7
* Add support for ARM v6 instructions.Nick Clifton2015-06-289-126/+3881
* sim: trace: drop unused trace_one_insnMike Frysinger2015-06-243-98/+5
* sim: trace: rename debug_printf fullyMike Frysinger2015-06-243-5/+10
* sim: trace: add a basic cpu register classMike Frysinger2015-06-248-42/+56
* sim: trace: add set of system helpersMike Frysinger2015-06-242-0/+28
* sim: trace: document alu/fpu/vpu trace options betterMike Frysinger2015-06-243-7/+14
* sim: common: replace SIM_FILTER_PATH with lbasenameMike Frysinger2015-06-233-26/+16
* sim: use AS_HELP_STRING everywhereMike Frysinger2015-06-2360-368/+791
* sim: trace: do not enable internal debug by defaultMike Frysinger2015-06-232-2/+6
* sim: assume recentish compiler/systemsMike Frysinger2015-06-236-43/+14