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path: root/sim/arm/armemu.c
Commit message (Expand)AuthorAgeFilesLines
* Add support for ARM v6 instructions.Nick Clifton2015-06-281-68/+920
* sim: arm: delete NEED_UI_LOOP_HOOK handlingMike Frysinger2015-03-301-19/+0
* sim: arm: clean up misc warningsMike Frysinger2015-03-301-1/+4
* Add support for instruction level tracing to the ARM simulator.Nick Clifton2014-03-141-15/+38
* Prevent writes to R15 via LDR or LDM from changing the ARM/Thumb state in pre...David McQuillan2014-03-141-2/+14
* sim: arm: add support for MOVW and MOVT instructionsMike Frysinger2013-05-151-4/+8
* [sim] Update old contact info in GPL license noticesJoel Brobecker2012-12-191-2/+1
* Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.Joel Brobecker2012-12-191-1/+1
* * armemu.c (handle_v6_insn): Fix typo in sign extension test of the sext and ...Nick Clifton2007-02-151-1/+1
* 2005-09-19 Paul Brook <paul@codesourcery.com>Paul Brook2005-09-191-26/+26
* Update the address of the FSF organizationNick Clifton2005-05-121-1/+1
* * armemu.c (handle_v6_insn): New function - emulate a few of the v6 instructi...Nick Clifton2005-04-251-0/+295
* Index: mn10200/ChangeLogAndrew Cagney2004-06-291-3/+3
* Remove use of __IWMMXT__.Nick Clifton2003-03-301-11/+3
* Add iWMMXt support to ARM simulatorNick Clifton2003-03-271-0/+27
* Add checks to catch invaliud XScale MIA, MIAPH and MIAxy instructions.Nick Clifton2002-07-051-68/+74
* Only perform access checks if 'check' is set.Nick Clifton2002-05-271-1/+1
* Fix parameters passed to CPRead[13] and CPRead[14].Nick Clifton2002-01-101-391/+417
* Add support for XScale's coprocessor access check register.Nick Clifton2001-10-181-444/+437
* Fix handling of XScale LDRD and STRD instructions with post indexed addressin...Nick Clifton2001-05-111-6/+6
* * XScale coprocessor support.Matthew Green2001-04-181-20/+87
* Add support for disabling alignment checks when performing GDB interfaceNick Clifton2001-02-281-2/+2
* Remove Prefetch abort for breakpoints. Instead set the state to RESUME.Nick Clifton2001-02-161-12/+2
* Add code to preserve processor mode when a prefetchNick Clifton2001-02-151-0/+11
* Add parentheses ready for future conbtributionNick Clifton2001-02-011-39/+63
* Update base address register after restoring register bank.Nick Clifton2001-02-011-26/+57
* Fix test for StoreDouble Instruction.Nick Clifton2000-12-191-12/+12
* oops - remove redundant prototype introduced in previous deltaNick Clifton2000-12-081-2/+0
* Add emulation of double word load and store instructions.Nick Clifton2000-12-081-3/+340
* Add support for ARM's v5TE architecture and Intel's XScale extenstionsNick Clifton2000-11-301-5/+491
* Compute write back value for post increment loads beforeNick Clifton2000-08-151-34/+41
* * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva2000-07-041-1/+1
* * armemu.h (INSN_SIZE): New macro.Alexandre Oliva2000-07-041-12/+23
* * armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva2000-07-041-2/+2
* * armemu.h (WRITEDESTB): New macro.Alexandre Oliva2000-07-041-37/+35
* * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva2000-07-041-4/+4
* * armemu.c (ARMul_Emulate): Compute writeback value beforeAlexandre Oliva2000-07-041-8/+16
* * armemu.c (Multiply64): Fix computation of flag N.Alexandre Oliva2000-06-221-4/+3
* * armemu.c (MultiplyAdd64): Fix computation of flag N.Alexandre Oliva2000-06-221-4/+3
* Add support for v4 SystemMode.Nick Clifton2000-05-301-1/+5
* * arm abort fixFrank Ch. Eigler2000-04-101-3/+3
* Fix compile time warning messages.Nick Clifton2000-02-081-6/+5
* import gdb-2000-02-04 snapshotJason Molenda2000-02-051-2738/+3128
* import gdb-1999-12-06 snapshotJason Molenda1999-12-071-6/+6
* import gdb-1999-07-12 snapshotJason Molenda1999-07-121-0/+2
* import gdb-19990422 snapshotStan Shebs1999-04-261-5/+37
* Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1999-04-161-0/+3454