diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/esp.c | 28 | ||||
| -rw-r--r-- | hw/ide.h | 6 | ||||
| -rw-r--r-- | hw/ide/pci.c | 13 | ||||
| -rw-r--r-- | hw/mips_malta.c | 19 | ||||
| -rw-r--r-- | hw/pc.c | 54 | ||||
| -rw-r--r-- | hw/piix4.c | 1 | ||||
| -rw-r--r-- | hw/sun4u.c | 12 |
7 files changed, 71 insertions, 62 deletions
@@ -203,14 +203,14 @@ static uint32_t get_cmd(ESPState *s, uint8_t *buf) return dmalen; } -static void do_cmd(ESPState *s, uint8_t *buf) +static void do_busid_cmd(ESPState *s, uint8_t *buf, uint8_t busid) { int32_t datalen; int lun; - DPRINTF("do_cmd: busid 0x%x\n", buf[0]); - lun = buf[0] & 7; - datalen = s->current_dev->send_command(s->current_dev, 0, &buf[1], lun); + DPRINTF("do_busid_cmd: busid 0x%x\n", busid); + lun = busid & 7; + datalen = s->current_dev->send_command(s->current_dev, 0, buf, lun); s->ti_size = datalen; if (datalen != 0) { s->rregs[ESP_RSTAT] = STAT_TC; @@ -229,6 +229,13 @@ static void do_cmd(ESPState *s, uint8_t *buf) esp_raise_irq(s); } +static void do_cmd(ESPState *s, uint8_t *buf) +{ + uint8_t busid = buf[0]; + + do_busid_cmd(s, &buf[1], busid); +} + static void handle_satn(ESPState *s) { uint8_t buf[32]; @@ -239,6 +246,17 @@ static void handle_satn(ESPState *s) do_cmd(s, buf); } +static void handle_s_without_atn(ESPState *s) +{ + uint8_t buf[32]; + int len; + + len = get_cmd(s, buf); + if (len) { + do_busid_cmd(s, buf, 0); + } +} + static void handle_satn_stop(ESPState *s) { s->cmdlen = get_cmd(s, s->cmdbuf); @@ -544,7 +562,7 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) break; case CMD_SEL: DPRINTF("Select without ATN (%2.2x)\n", val); - handle_satn(s); + handle_s_without_atn(s); break; case CMD_SELATN: DPRINTF("Select with ATN (%2.2x)\n", val); @@ -10,10 +10,8 @@ void isa_ide_init(int iobase, int iobase2, qemu_irq irq, /* ide-pci.c */ void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table, int secondary_ide_enabled); -void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, - qemu_irq *pic); -void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, - qemu_irq *pic); +void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn); +void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn); /* ide-macio.c */ int pmac_ide_init (DriveInfo **hd_table, qemu_irq irq, diff --git a/hw/ide/pci.c b/hw/ide/pci.c index 0e8583a04..607472bb5 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -443,8 +443,7 @@ static void piix3_reset(void *opaque) /* hd_table must contain 4 block drivers */ /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */ -void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, - qemu_irq *pic) +void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) { PCIIDEState *d; uint8_t *pci_conf; @@ -479,8 +478,7 @@ void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, /* hd_table must contain 4 block drivers */ /* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */ -void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, - qemu_irq *pic) +void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) { PCIIDEState *d; uint8_t *pci_conf; @@ -505,11 +503,8 @@ void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, pci_register_bar((PCIDevice *)d, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map); - /* - * These should call isa_reserve_irq() instead when MIPS supports it - */ - ide_init2(&d->bus[0], hd_table[0], hd_table[1], pic[14]); - ide_init2(&d->bus[1], hd_table[2], hd_table[3], pic[15]); + ide_init2(&d->bus[0], hd_table[0], hd_table[1], isa_reserve_irq(14)); + ide_init2(&d->bus[1], hd_table[2], hd_table[3], isa_reserve_irq(15)); ide_init_ioport(&d->bus[0], 0x1f0, 0x3f6); ide_init_ioport(&d->bus[1], 0x170, 0x376); diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 275f72c65..bb6364b08 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -765,6 +765,7 @@ void mips_malta_init (ram_addr_t ram_size, target_long bios_size; int64_t kernel_entry; PCIBus *pci_bus; + ISADevice *isa_dev; CPUState *env; RTCState *rtc_state; fdctrl_t *floppy_controller; @@ -903,9 +904,10 @@ void mips_malta_init (ram_addr_t ram_size, } piix4_devfn = piix4_init(pci_bus, 80); - pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259); + isa_bus_irqs(i8259); + pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); - smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, i8259[9]); + smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9)); eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ for (i = 0; i < 8; i++) { /* TODO: Populate SPD eeprom data. */ @@ -915,16 +917,17 @@ void mips_malta_init (ram_addr_t ram_size, qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256)); qdev_init(eeprom); } - pit = pit_init(0x40, i8259[0]); + pit = pit_init(0x40, isa_reserve_irq(0)); DMA_init(0); /* Super I/O */ - i8042_init(i8259[1], i8259[12], 0x60); - rtc_state = rtc_init(0x70, i8259[8], 2000); - serial_init(0x3f8, i8259[4], 115200, serial_hds[0]); - serial_init(0x2f8, i8259[3], 115200, serial_hds[1]); + isa_dev = isa_create_simple("i8042", 0x60, 0x64, 1, 12); + + rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); + serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]); + serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]); if (parallel_hds[0]) - parallel_init(0x378, i8259[7], parallel_hds[0]); + parallel_init(0x378, isa_reserve_irq(7), parallel_hds[0]); for(i = 0; i < MAX_FD; i++) { dinfo = drive_get(IF_FLOPPY, 0, i); fd[i] = dinfo ? dinfo->bdrv : NULL; @@ -553,7 +553,7 @@ static void generate_bootsect(target_phys_addr_t option_rom, *p++ = 0x1f; /* pop ds */ *p++ = 0x58; /* pop ax */ *p++ = 0xcb; /* lret */ - + /* Actual code */ *reloc = (p - rom); @@ -742,7 +742,7 @@ static int load_multiboot(void *fw_cfg, if ((next_space = strchr(initrd_filename, ' '))) *next_space = '\0'; #ifdef DEBUG_MULTIBOOT - printf("multiboot loading module: %s\n", initrd_filename); + printf("multiboot loading module: %s\n", initrd_filename); #endif f = fopen(initrd_filename, "rb"); if (f) { @@ -862,7 +862,7 @@ static void load_linux(void *fw_cfg, treating it like a Linux kernel. */ if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename, kernel_cmdline, header)) - return; + return; protocol = 0; } @@ -1062,35 +1062,35 @@ static void pc_init_ne2k_isa(NICInfo *nd) static int load_option_rom(const char *oprom, target_phys_addr_t start, target_phys_addr_t end) { - int size; - char *filename; - - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom); - if (filename) { - size = get_image_size(filename); - if (size > 0 && start + size > end) { - fprintf(stderr, "Not enough space to load option rom '%s'\n", - oprom); - exit(1); - } - size = load_image_targphys(filename, start, end - start); - qemu_free(filename); - } else { - size = -1; - } - if (size < 0) { - fprintf(stderr, "Could not load option rom '%s'\n", oprom); + int size; + char *filename; + + filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom); + if (filename) { + size = get_image_size(filename); + if (size > 0 && start + size > end) { + fprintf(stderr, "Not enough space to load option rom '%s'\n", + oprom); exit(1); } - /* Round up optiom rom size to the next 2k boundary */ - size = (size + 2047) & ~2047; - option_rom_setup_reset(start, size); - return size; + size = load_image_targphys(filename, start, end - start); + qemu_free(filename); + } else { + size = -1; + } + if (size < 0) { + fprintf(stderr, "Could not load option rom '%s'\n", oprom); + exit(1); + } + /* Round up optiom rom size to the next 2k boundary */ + size = (size + 2047) & ~2047; + option_rom_setup_reset(start, size); + return size; } int cpu_is_bsp(CPUState *env) { - return env->cpuid_apic_id == 0; + return env->cpuid_apic_id == 0; } CPUState *pc_new_cpu(const char *cpu_model) @@ -1387,7 +1387,7 @@ static void pc_init1(ram_addr_t ram_size, } if (pci_enabled) { - pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, isa_irq); + pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); } else { for(i = 0; i < MAX_IDE_BUS; i++) { isa_ide_init(ide_iobase[i], ide_iobase2[i], diff --git a/hw/piix4.c b/hw/piix4.c index a9849eeeb..a6aea15e7 100644 --- a/hw/piix4.c +++ b/hw/piix4.c @@ -86,6 +86,7 @@ static int piix4_initfn(PCIDevice *d) { uint8_t *pci_conf; + isa_bus_new(&d->qdev); register_savevm("PIIX4", 0, 2, piix_save, piix_load, d); pci_conf = d->config; diff --git a/hw/sun4u.c b/hw/sun4u.c index 098df9da8..03855d34f 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -326,18 +326,12 @@ void cpu_tick_set_limit(void *opaque, uint64_t limit) ptimer_set_limit(opaque, -limit, 0); } -static const int ide_iobase[2] = { 0x1f0, 0x170 }; -static const int ide_iobase2[2] = { 0x3f6, 0x376 }; -static const int ide_irq[2] = { 14, 15 }; - static const int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; static const int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; -static fdctrl_t *floppy_controller; - static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num, uint32_t addr, uint32_t size, int type) { @@ -623,13 +617,13 @@ static void sun4uv_init(ram_addr_t RAM_size, pci_cmd646_ide_init(pci_bus, hd, 1); - /* FIXME: wire up interrupts. */ - i8042_init(NULL/*1*/, NULL/*12*/, 0x60); + isa_create_simple("i8042", 0x60, 0x64, 1, 12); for(i = 0; i < MAX_FD; i++) { dinfo = drive_get(IF_FLOPPY, 0, i); fd[i] = dinfo ? dinfo->bdrv : NULL; } - floppy_controller = fdctrl_init_isa(6, 2, 0x3f0, fd); + fdctrl_init_isa(6, 2, 0x3f0, fd); + /* FIXME: wire up interrupts. */ nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59); initrd_size = 0; |