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author | Stefan Weil <weil@mail.berlios.de> | 2010-04-09 17:28:40 +0200 |
---|---|---|
committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-04-14 01:02:24 +0200 |
commit | d80e20a1c32bd1bd73cb6e435a01687211e3b3da (patch) | |
tree | 885a5d02869232c2d77bf40a50ef4802a3372002 /tcg | |
parent | sh_pci: fix memory and I/O access (diff) | |
download | qemu-kvm-d80e20a1c32bd1bd73cb6e435a01687211e3b3da.tar.gz qemu-kvm-d80e20a1c32bd1bd73cb6e435a01687211e3b3da.tar.bz2 qemu-kvm-d80e20a1c32bd1bd73cb6e435a01687211e3b3da.zip |
tcp/mips: Change TCG_AREG0 (fp -> s0)
Register fp (frame pointer) is a bad choice for compilations
without optimisation, because the compiler makes heavy use
of this register (so the resulting code crashes).
Register s0 had been used for TCG_AREG1 in earlier releases,
but was no longer used and is now free for TCG_AREG0.
The resulting code works for compilations without
optimisation (tested with qemu mips in qemu mips
on x86 host).
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/mips/tcg-target.c | 5 | ||||
-rw-r--r-- | tcg/mips/tcg-target.h | 6 |
2 files changed, 6 insertions, 5 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 3ed9217e3..79ba9a662 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1273,7 +1273,9 @@ static const TCGTargetOpDef mips_op_defs[] = { }; static int tcg_target_callee_save_regs[] = { +#if 0 /* used for the global env (TCG_AREG0), so no need to save */ TCG_REG_S0, +#endif TCG_REG_S1, TCG_REG_S2, TCG_REG_S3, @@ -1282,8 +1284,7 @@ static int tcg_target_callee_save_regs[] = { TCG_REG_S6, TCG_REG_S7, TCG_REG_GP, - /* TCG_REG_FP, */ /* currently used for the global env, so np - need to save */ + TCG_REG_FP, TCG_REG_RA, /* should be last for ABI compliance */ }; diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 46760a50e..baae6d85c 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -92,9 +92,9 @@ enum { #undef TCG_TARGET_HAS_ext16u_i32 /* andi rt, rs, 0xffff */ /* Note: must be synced with dyngen-exec.h */ -#define TCG_AREG0 TCG_REG_FP -#define TCG_AREG1 TCG_REG_S0 -#define TCG_AREG2 TCG_REG_S1 +#define TCG_AREG0 TCG_REG_S0 +#define TCG_AREG1 TCG_REG_S1 +#define TCG_AREG2 TCG_REG_FP #include <sys/cachectl.h> |