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authoraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-13 20:06:26 +0000
committeraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-13 20:06:26 +0000
commit71ac3b08ae5d60d9f21879691dc54633b9d88294 (patch)
treec625b3b372f0c59df724d672ecbc490bf89303f3 /pc-bios
parentFix 64 bit issue in slirp (diff)
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Update bochs bios
They have applied all of our patches and they have an additional HPET fix. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6289 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'pc-bios')
-rw-r--r--pc-bios/bios-pq/0002_e820-high-mem.patch129
-rw-r--r--pc-bios/bios-pq/0003_smp-startup-poll.patch21
-rw-r--r--pc-bios/bios-pq/0005_hpet.patch190
-rw-r--r--pc-bios/bios-pq/HEAD2
-rw-r--r--pc-bios/bios-pq/series3
-rw-r--r--pc-bios/bios.binbin131072 -> 131072 bytes
6 files changed, 1 insertions, 344 deletions
diff --git a/pc-bios/bios-pq/0002_e820-high-mem.patch b/pc-bios/bios-pq/0002_e820-high-mem.patch
deleted file mode 100644
index 2886e8566..000000000
--- a/pc-bios/bios-pq/0002_e820-high-mem.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From: Izik Eidus <izike@qumranet.com>
-
-add support to memory above the pci hole
-
-the new memory region is mapped after address 0x100000000,
-the bios take the size of the memory after the 0x100000000 from
-three new cmos bytes.
-
-diff --git a/bios/rombios.c b/bios/rombios.c
-index 1be0816..b70f249 100644
---- a/bios/rombios.c
-+++ b/bios/rombios.c
-@@ -4442,22 +4442,25 @@ BX_DEBUG_INT15("case default:\n");
- #endif // BX_USE_PS2_MOUSE
-
-
--void set_e820_range(ES, DI, start, end, type)
-+void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
- Bit16u ES;
- Bit16u DI;
- Bit32u start;
- Bit32u end;
-+ Bit8u extra_start;
-+ Bit8u extra_end;
- Bit16u type;
- {
- write_word(ES, DI, start);
- write_word(ES, DI+2, start >> 16);
-- write_word(ES, DI+4, 0x00);
-+ write_word(ES, DI+4, extra_start);
- write_word(ES, DI+6, 0x00);
-
- end -= start;
-+ extra_end -= extra_start;
- write_word(ES, DI+8, end);
- write_word(ES, DI+10, end >> 16);
-- write_word(ES, DI+12, 0x0000);
-+ write_word(ES, DI+12, extra_end);
- write_word(ES, DI+14, 0x0000);
-
- write_word(ES, DI+16, type);
-@@ -4470,7 +4473,9 @@ int15_function32(regs, ES, DS, FLAGS)
- Bit16u ES, DS, FLAGS;
- {
- Bit32u extended_memory_size=0; // 64bits long
-+ Bit32u extra_lowbits_memory_size=0;
- Bit16u CX,DX;
-+ Bit8u extra_highbits_memory_size=0;
-
- BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
-
-@@ -4544,11 +4549,18 @@ ASM_END
- extended_memory_size += (1L * 1024 * 1024);
- }
-
-+ extra_lowbits_memory_size = inb_cmos(0x5c);
-+ extra_lowbits_memory_size <<= 8;
-+ extra_lowbits_memory_size |= inb_cmos(0x5b);
-+ extra_lowbits_memory_size *= 64;
-+ extra_lowbits_memory_size *= 1024;
-+ extra_highbits_memory_size = inb_cmos(0x5d);
-+
- switch(regs.u.r16.bx)
- {
- case 0:
- set_e820_range(ES, regs.u.r16.di,
-- 0x0000000L, 0x0009f000L, 1);
-+ 0x0000000L, 0x0009f000L, 0, 0, 1);
- regs.u.r32.ebx = 1;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4557,7 +4569,7 @@ ASM_END
- break;
- case 1:
- set_e820_range(ES, regs.u.r16.di,
-- 0x0009f000L, 0x000a0000L, 2);
-+ 0x0009f000L, 0x000a0000L, 0, 0, 2);
- regs.u.r32.ebx = 2;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4566,7 +4578,7 @@ ASM_END
- break;
- case 2:
- set_e820_range(ES, regs.u.r16.di,
-- 0x000e8000L, 0x00100000L, 2);
-+ 0x000e8000L, 0x00100000L, 0, 0, 2);
- regs.u.r32.ebx = 3;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4577,7 +4589,7 @@ ASM_END
- #if BX_ROMBIOS32
- set_e820_range(ES, regs.u.r16.di,
- 0x00100000L,
-- extended_memory_size - ACPI_DATA_SIZE, 1);
-+ extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
- regs.u.r32.ebx = 4;
- #else
- set_e820_range(ES, regs.u.r16.di,
-@@ -4593,7 +4605,7 @@ ASM_END
- case 4:
- set_e820_range(ES, regs.u.r16.di,
- extended_memory_size - ACPI_DATA_SIZE,
-- extended_memory_size, 3); // ACPI RAM
-+ extended_memory_size ,0, 0, 3); // ACPI RAM
- regs.u.r32.ebx = 5;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4603,7 +4615,20 @@ ASM_END
- case 5:
- /* 256KB BIOS area at the end of 4 GB */
- set_e820_range(ES, regs.u.r16.di,
-- 0xfffc0000L, 0x00000000L, 2);
-+ 0xfffc0000L, 0x00000000L ,0, 0, 2);
-+ if (extra_highbits_memory_size || extra_lowbits_memory_size)
-+ regs.u.r32.ebx = 6;
-+ else
-+ regs.u.r32.ebx = 0;
-+ regs.u.r32.eax = 0x534D4150;
-+ regs.u.r32.ecx = 0x14;
-+ CLEAR_CF();
-+ return;
-+ case 6:
-+ /* Maping of memory above 4 GB */
-+ set_e820_range(ES, regs.u.r16.di, 0x00000000L,
-+ extra_lowbits_memory_size, 1, extra_highbits_memory_size
-+ + 1, 1);
- regs.u.r32.ebx = 0;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
diff --git a/pc-bios/bios-pq/0003_smp-startup-poll.patch b/pc-bios/bios-pq/0003_smp-startup-poll.patch
deleted file mode 100644
index cd1a3ff03..000000000
--- a/pc-bios/bios-pq/0003_smp-startup-poll.patch
+++ /dev/null
@@ -1,21 +0,0 @@
-From: Avi Kivity <avi@qumranet.com>
-
-instead of timing out, wait until all cpus are up
-
-diff --git a/bios/rombios32.c b/bios/rombios32.c
-index ef98a41..05ba40d 100644
---- a/bios/rombios32.c
-+++ b/bios/rombios32.c
-@@ -512,7 +512,12 @@ void smp_probe(void)
- sipi_vector = AP_BOOT_ADDR >> 12;
- writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
-
-+#ifndef BX_QEMU
- delay_ms(10);
-+#else
-+ while (cmos_readb(0x5f) + 1 != readw(&smp_cpus))
-+ ;
-+#endif
- }
- BX_INFO("Found %d cpu(s)\n", readw(&smp_cpus));
- }
diff --git a/pc-bios/bios-pq/0005_hpet.patch b/pc-bios/bios-pq/0005_hpet.patch
deleted file mode 100644
index 9347cb501..000000000
--- a/pc-bios/bios-pq/0005_hpet.patch
+++ /dev/null
@@ -1,190 +0,0 @@
-BOCHS BIOS changes to support HPET in QEMU.
-
-Signed-off-by Beth Kon <eak@us.ibm.com>
-
-Index: bochs-2.3.7/bios/acpi-dsdt.dsl
-===================================================================
---- bochs-2.3.7.orig/bios/acpi-dsdt.dsl 2008-10-15 12:39:14.000000000 -0500
-+++ bochs-2.3.7/bios/acpi-dsdt.dsl 2008-10-28 07:58:40.000000000 -0500
-@@ -159,6 +159,26 @@
- Return (MEMP)
- }
- }
-+#ifdef BX_QEMU
-+ Device(HPET) {
-+ Name(_HID, EISAID("PNP0103"))
-+ Name(_UID, 0)
-+ Method (_STA, 0, NotSerialized) {
-+ Return(0x0F)
-+ }
-+ Name(_CRS, ResourceTemplate() {
-+ DWordMemory(
-+ ResourceConsumer, PosDecode, MinFixed, MaxFixed,
-+ NonCacheable, ReadWrite,
-+ 0x00000000,
-+ 0xFED00000,
-+ 0xFED003FF,
-+ 0x00000000,
-+ 0x00000400 /* 1K memory: FED00000 - FED003FF */
-+ )
-+ })
-+ }
-+#endif
- }
-
- Scope(\_SB.PCI0) {
-Index: bochs-2.3.7/bios/rombios32.c
-===================================================================
---- bochs-2.3.7.orig/bios/rombios32.c 2008-10-15 12:39:36.000000000 -0500
-+++ bochs-2.3.7/bios/rombios32.c 2008-11-12 14:41:41.000000000 -0600
-@@ -1087,7 +1087,11 @@
- struct rsdt_descriptor_rev1
- {
- ACPI_TABLE_HEADER_DEF /* ACPI common table header */
-+#ifdef BX_QEMU
-+ uint32_t table_offset_entry [4]; /* Array of pointers to other */
-+#else
- uint32_t table_offset_entry [3]; /* Array of pointers to other */
-+#endif
- /* ACPI tables */
- };
-
-@@ -1227,6 +1231,32 @@
- #endif
- };
-
-+#ifdef BX_QEMU
-+/*
-+ * * ACPI 2.0 Generic Address Space definition.
-+ * */
-+struct acpi_20_generic_address {
-+ uint8_t address_space_id;
-+ uint8_t register_bit_width;
-+ uint8_t register_bit_offset;
-+ uint8_t reserved;
-+ uint64_t address;
-+};
-+
-+/*
-+ * * HPET Description Table
-+ * */
-+struct acpi_20_hpet {
-+ ACPI_TABLE_HEADER_DEF /* ACPI common table header */
-+ uint32_t timer_block_id;
-+ struct acpi_20_generic_address addr;
-+ uint8_t hpet_number;
-+ uint16_t min_tick;
-+ uint8_t page_protect;
-+};
-+#define ACPI_HPET_ADDRESS 0xFED00000UL
-+#endif
-+
- struct madt_io_apic
- {
- APIC_HEADER_DEF
-@@ -1237,6 +1267,17 @@
- * lines start */
- };
-
-+#ifdef BX_QEMU
-+struct madt_int_override
-+{
-+ APIC_HEADER_DEF
-+ uint8_t bus; /* Identifies ISA Bus */
-+ uint8_t source; /* Bus-relative interrupt source */
-+ uint32_t gsi; /* GSI that source will signal */
-+ uint16_t flags; /* MPS INTI flags */
-+};
-+#endif
-+
- #include "acpi-dsdt.hex"
-
- static inline uint16_t cpu_to_le16(uint16_t x)
-@@ -1342,6 +1383,10 @@
- struct facs_descriptor_rev1 *facs;
- struct multiple_apic_table *madt;
- uint8_t *dsdt, *ssdt;
-+#ifdef BX_QEMU
-+ struct acpi_20_hpet *hpet;
-+ uint32_t hpet_addr;
-+#endif
- uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr, ssdt_addr;
- uint32_t acpi_tables_size, madt_addr, madt_size;
- int i;
-@@ -1384,10 +1429,21 @@
- madt_addr = addr;
- madt_size = sizeof(*madt) +
- sizeof(struct madt_processor_apic) * smp_cpus +
-+#ifdef BX_QEMU
-+ sizeof(struct madt_io_apic) + sizeof(struct madt_int_override);
-+#else
- sizeof(struct madt_io_apic);
-+#endif
- madt = (void *)(addr);
- addr += madt_size;
-
-+#ifdef BX_QEMU
-+ addr = (addr + 7) & ~7;
-+ hpet_addr = addr;
-+ hpet = (void *)(addr);
-+ addr += sizeof(*hpet);
-+#endif
-+
- acpi_tables_size = addr - base_addr;
-
- BX_INFO("ACPI tables: RSDP addr=0x%08lx ACPI DATA addr=0x%08lx size=0x%x\n",
-@@ -1410,6 +1466,9 @@
- rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr);
- rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr);
- rsdt->table_offset_entry[2] = cpu_to_le32(ssdt_addr);
-+#ifdef BX_QEMU
-+ rsdt->table_offset_entry[3] = cpu_to_le32(hpet_addr);
-+#endif
- acpi_build_table_header((struct acpi_table_header *)rsdt,
- "RSDT", sizeof(*rsdt), 1);
-
-@@ -1448,6 +1507,9 @@
- {
- struct madt_processor_apic *apic;
- struct madt_io_apic *io_apic;
-+#ifdef BX_QEMU
-+ struct madt_int_override *int_override;
-+#endif
-
- memset(madt, 0, madt_size);
- madt->local_apic_address = cpu_to_le32(0xfee00000);
-@@ -1467,10 +1529,34 @@
- io_apic->io_apic_id = smp_cpus;
- io_apic->address = cpu_to_le32(0xfec00000);
- io_apic->interrupt = cpu_to_le32(0);
-+#ifdef BX_QEMU
-+ io_apic++;
-+
-+ int_override = (void *)io_apic;
-+ int_override->type = APIC_XRUPT_OVERRIDE;
-+ int_override->length = sizeof(*int_override);
-+ int_override->bus = cpu_to_le32(0);
-+ int_override->source = cpu_to_le32(0);
-+ int_override->gsi = cpu_to_le32(2);
-+ int_override->flags = cpu_to_le32(0);
-+#endif
-
- acpi_build_table_header((struct acpi_table_header *)madt,
- "APIC", madt_size, 1);
- }
-+
-+#ifdef BX_QEMU
-+ /* HPET */
-+ memset(hpet, 0, sizeof(*hpet));
-+ /* Note timer_block_id value must be kept in sync with value advertised by
-+ * emulated hpet
-+ */
-+ hpet->timer_block_id = cpu_to_le32(0x8086a201);
-+ hpet->addr.address = cpu_to_le32(ACPI_HPET_ADDRESS);
-+ acpi_build_table_header((struct acpi_table_header *)hpet,
-+ "HPET", sizeof(*hpet), 1);
-+#endif
-+
- }
-
- /* SMBIOS entry point -- must be written to a 16-bit aligned address
diff --git a/pc-bios/bios-pq/HEAD b/pc-bios/bios-pq/HEAD
index 928a2334b..1f604ae82 100644
--- a/pc-bios/bios-pq/HEAD
+++ b/pc-bios/bios-pq/HEAD
@@ -1 +1 @@
-370a7e0d8419bc05192d766c11b7221e5ffc0f75
+7342176bb0fa9d6cc63b37f6ac239e3f70b74219
diff --git a/pc-bios/bios-pq/series b/pc-bios/bios-pq/series
index 0e7558c47..556c0e48d 100644
--- a/pc-bios/bios-pq/series
+++ b/pc-bios/bios-pq/series
@@ -1,4 +1 @@
0001_bx-qemu.patch
-0002_e820-high-mem.patch
-0003_smp-startup-poll.patch
-0005_hpet.patch
diff --git a/pc-bios/bios.bin b/pc-bios/bios.bin
index 5120192de..ac444c149 100644
--- a/pc-bios/bios.bin
+++ b/pc-bios/bios.bin
Binary files differ