diff options
| -rw-r--r-- | cpu/ChangeLog | 6 | ||||
| -rw-r--r-- | cpu/frv.opc | 28 | ||||
| -rw-r--r-- | cpu/m32r.opc | 7 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 20 | ||||
| -rw-r--r-- | opcodes/cgen-dis.in | 12 | ||||
| -rw-r--r-- | opcodes/fr30-asm.c | 44 | ||||
| -rw-r--r-- | opcodes/fr30-dis.c | 12 | ||||
| -rw-r--r-- | opcodes/frv-asm.c | 88 | ||||
| -rw-r--r-- | opcodes/frv-dis.c | 12 | ||||
| -rw-r--r-- | opcodes/ia64-opc.c | 2 | ||||
| -rw-r--r-- | opcodes/ip2k-asm.c | 198 | ||||
| -rw-r--r-- | opcodes/ip2k-dis.c | 12 | ||||
| -rw-r--r-- | opcodes/iq2000-asm.c | 58 | ||||
| -rw-r--r-- | opcodes/iq2000-dis.c | 12 | ||||
| -rw-r--r-- | opcodes/m32r-asm.c | 28 | ||||
| -rw-r--r-- | opcodes/m32r-dis.c | 18 | ||||
| -rw-r--r-- | opcodes/openrisc-asm.c | 47 | ||||
| -rw-r--r-- | opcodes/openrisc-dis.c | 12 | ||||
| -rw-r--r-- | opcodes/xstormy16-asm.c | 32 | ||||
| -rw-r--r-- | opcodes/xstormy16-dis.c | 12 |
20 files changed, 331 insertions, 329 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 868fc995873..7cbbfffc9e1 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,9 @@ +2005-02-23 Nick Clifton <nickc@redhat.com> + + * frv.opc: Fixed compile time warnings about differing signed'ness + of pointers passed to functions. + * m32r.opc: Likewise. + 2005-02-11 Nick Clifton <nickc@redhat.com> * iq2000.opc (parse_jtargq10): Change type of valuep argument to diff --git a/cpu/frv.opc b/cpu/frv.opc index 298252a3c8e..1de2385f351 100644 --- a/cpu/frv.opc +++ b/cpu/frv.opc @@ -1,6 +1,6 @@ /* Fujitsu FRV opcode support, for GNU Binutils. -*- C -*- - Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc. + Copyright 2000, 2001, 2003, 2004, 2005 Free Software Foundation, Inc. Contributed by Red Hat Inc; developed under contract from Fujitsu. @@ -948,7 +948,7 @@ spr_valid (regno) static const char * parse_ulo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_uslo16 - PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, signed long *)); static const char * parse_uhi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static long parse_register_number @@ -964,11 +964,11 @@ static const char * parse_u12 static const char * parse_even_register PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *)); static const char * parse_A0 - PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_A1 - PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_A - PARAMS ((CGEN_CPU_DESC, const char **, int, long *, long)); + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, long)); inline static const char * parse_symbolic_address (CGEN_CPU_DESC cd, @@ -997,7 +997,7 @@ static const char * parse_ldd_annotation (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -1036,7 +1036,7 @@ static const char * parse_call_annotation (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -1075,7 +1075,7 @@ static const char * parse_ld_annotation (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -1234,7 +1234,7 @@ parse_ulo16 (cd, strp, opindex, valuep) return errmsg; } } - return cgen_parse_signed_integer (cd, strp, opindex, valuep); + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); } static const char * @@ -1242,7 +1242,7 @@ parse_uslo16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - unsigned long *valuep; + signed long *valuep; { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -1361,7 +1361,7 @@ parse_uslo16 (cd, strp, opindex, valuep) return errmsg; } } - return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); + return cgen_parse_signed_integer (cd, strp, opindex, valuep); } static const char * @@ -1820,7 +1820,7 @@ parse_A (cd, strp, opindex, valuep, A) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; long A; { const char *errmsg; @@ -1843,7 +1843,7 @@ parse_A0 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { return parse_A (cd, strp, opindex, valuep, 0); } @@ -1853,7 +1853,7 @@ parse_A1 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { return parse_A (cd, strp, opindex, valuep, 1); } diff --git a/cpu/m32r.opc b/cpu/m32r.opc index 78bd0facef4..590a44a8f65 100644 --- a/cpu/m32r.opc +++ b/cpu/m32r.opc @@ -1,6 +1,7 @@ /* M32R opcode support. -*- C -*- - Copyright 1998, 1999, 2000, 2001, 2004 Free Software Foundation, Inc. + Copyright 1998, 1999, 2000, 2001, 2004, 2005 + Free Software Foundation, Inc. Contributed by Red Hat Inc; developed under contract from Mitsubishi Electric Corporation. @@ -88,7 +89,7 @@ m32r_cgen_dis_hash (buf, value) /* -- asm.c */ static const char * parse_hash - PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_slo16 @@ -103,7 +104,7 @@ parse_hash (cd, strp, opindex, valuep) CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; const char **strp; int opindex ATTRIBUTE_UNUSED; - unsigned long *valuep ATTRIBUTE_UNUSED; + long *valuep ATTRIBUTE_UNUSED; { if (**strp == '#') ++*strp; diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b91bc1e3c4f..e01507f95aa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,9 +1,29 @@ 2005-02-23 Nick Clifton <nickc@redhat.com> + * cgen-dis.in: Use bfd_byte for buffers that are passed to + read_memory. + + * ia64-opc.c (locate_opcode_ent): Initialise opval array. + * crx-dis.c (make_instruction): Move argument structure into inner scope and ensure that all of its fields are initialised before they are used. + * fr30-asm.c: Regenerate. + * fr30-dis.c: Regenerate. + * frv-asm.c: Regenerate. + * frv-dis.c: Regenerate. + * ip2k-asm.c: Regenerate. + * ip2k-dis.c: Regenerate. + * iq2000-asm.c: Regenerate. + * iq2000-dis.c: Regenerate. + * m32r-asm.c: Regenerate. + * m32r-dis.c: Regenerate. + * openrisc-asm.c: Regenerate. + * openrisc-dis.c: Regenerate. + * xstormy16-asm.c: Regenerate. + * xstormy16-dis.c: Regenerate. + 2005-02-22 Alan Modra <amodra@bigpond.net.au> * arc-ext.c: Warning fixes. diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in index 81525e3a468..5b59a353718 100644 --- a/opcodes/cgen-dis.in +++ b/opcodes/cgen-dis.in @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -177,7 +177,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -207,7 +207,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -231,7 +231,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -315,7 +315,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c index f1c18a16bd5..abcdc9b16ae 100644 --- a/opcodes/fr30-asm.c +++ b/opcodes/fr30-asm.c @@ -235,37 +235,37 @@ fr30_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2); break; case FR30_OPERAND_CC : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, (unsigned long *) (& fields->f_cc)); break; case FR30_OPERAND_CCC : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, (unsigned long *) (& fields->f_ccc)); break; case FR30_OPERAND_DIR10 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, (unsigned long *) (& fields->f_dir10)); break; case FR30_OPERAND_DIR8 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, (unsigned long *) (& fields->f_dir8)); break; case FR30_OPERAND_DIR9 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, (unsigned long *) (& fields->f_dir9)); break; case FR30_OPERAND_DISP10 : - errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10); + errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, (long *) (& fields->f_disp10)); break; case FR30_OPERAND_DISP8 : - errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8); + errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, (long *) (& fields->f_disp8)); break; case FR30_OPERAND_DISP9 : - errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9); + errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, (long *) (& fields->f_disp9)); break; case FR30_OPERAND_I20 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, (unsigned long *) (& fields->f_i20)); break; case FR30_OPERAND_I32 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, (unsigned long *) (& fields->f_i32)); break; case FR30_OPERAND_I8 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, (unsigned long *) (& fields->f_i8)); break; case FR30_OPERAND_LABEL12 : { @@ -282,40 +282,40 @@ fr30_cgen_parse_operand (cd, opindex, strp, fields) } break; case FR30_OPERAND_M4 : - errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4); + errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, (long *) (& fields->f_m4)); break; case FR30_OPERAND_PS : errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & junk); break; case FR30_OPERAND_REGLIST_HI_LD : - errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld); + errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, (unsigned long *) (& fields->f_reglist_hi_ld)); break; case FR30_OPERAND_REGLIST_HI_ST : - errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st); + errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, (unsigned long *) (& fields->f_reglist_hi_st)); break; case FR30_OPERAND_REGLIST_LOW_LD : - errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld); + errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, (unsigned long *) (& fields->f_reglist_low_ld)); break; case FR30_OPERAND_REGLIST_LOW_ST : - errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st); + errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, (unsigned long *) (& fields->f_reglist_low_st)); break; case FR30_OPERAND_S10 : - errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10); + errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, (long *) (& fields->f_s10)); break; case FR30_OPERAND_U10 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, (unsigned long *) (& fields->f_u10)); break; case FR30_OPERAND_U4 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, (unsigned long *) (& fields->f_u4)); break; case FR30_OPERAND_U4C : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, (unsigned long *) (& fields->f_u4c)); break; case FR30_OPERAND_U8 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, (unsigned long *) (& fields->f_u8)); break; case FR30_OPERAND_UDISP6 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6); + errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, (unsigned long *) (& fields->f_udisp6)); break; default : diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index 400651b90c4..ee647e95565 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -458,7 +458,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -488,7 +488,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -512,7 +512,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -596,7 +596,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c index 52d3bc117e3..635f9c742c6 100644 --- a/opcodes/frv-asm.c +++ b/opcodes/frv-asm.c @@ -51,7 +51,7 @@ static const char * parse_insn_normal static const char * parse_ulo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_uslo16 - PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, signed long *)); static const char * parse_uhi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static long parse_register_number @@ -67,11 +67,11 @@ static const char * parse_u12 static const char * parse_even_register PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *)); static const char * parse_A0 - PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_A1 - PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_A - PARAMS ((CGEN_CPU_DESC, const char **, int, long *, long)); + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, long)); inline static const char * parse_symbolic_address (CGEN_CPU_DESC cd, @@ -100,7 +100,7 @@ static const char * parse_ldd_annotation (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -139,7 +139,7 @@ static const char * parse_call_annotation (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -178,7 +178,7 @@ static const char * parse_ld_annotation (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -337,7 +337,7 @@ parse_ulo16 (cd, strp, opindex, valuep) return errmsg; } } - return cgen_parse_signed_integer (cd, strp, opindex, valuep); + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); } static const char * @@ -345,7 +345,7 @@ parse_uslo16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - unsigned long *valuep; + signed long *valuep; { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -464,7 +464,7 @@ parse_uslo16 (cd, strp, opindex, valuep) return errmsg; } } - return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); + return cgen_parse_signed_integer (cd, strp, opindex, valuep); } static const char * @@ -923,7 +923,7 @@ parse_A (cd, strp, opindex, valuep, A) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; long A; { const char *errmsg; @@ -946,7 +946,7 @@ parse_A0 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { return parse_A (cd, strp, opindex, valuep, 0); } @@ -956,7 +956,7 @@ parse_A1 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { return parse_A (cd, strp, opindex, valuep, 1); } @@ -1045,10 +1045,10 @@ frv_cgen_parse_operand (cd, opindex, strp, fields) switch (opindex) { case FRV_OPERAND_A0 : - errmsg = parse_A0 (cd, strp, FRV_OPERAND_A0, &fields->f_A); + errmsg = parse_A0 (cd, strp, FRV_OPERAND_A0, (unsigned long *) (& fields->f_A)); break; case FRV_OPERAND_A1 : - errmsg = parse_A1 (cd, strp, FRV_OPERAND_A1, &fields->f_A); + errmsg = parse_A1 (cd, strp, FRV_OPERAND_A1, (unsigned long *) (& fields->f_A)); break; case FRV_OPERAND_ACC40SI : errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_acc_names, & fields->f_ACC40Si); @@ -1180,46 +1180,46 @@ frv_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_iccr_names, & fields->f_ICCi_3); break; case FRV_OPERAND_LI : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LI, &fields->f_LI); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LI, (unsigned long *) (& fields->f_LI)); break; case FRV_OPERAND_LRAD : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAD, &fields->f_LRAD); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAD, (unsigned long *) (& fields->f_LRAD)); break; case FRV_OPERAND_LRAE : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAE, &fields->f_LRAE); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAE, (unsigned long *) (& fields->f_LRAE)); break; case FRV_OPERAND_LRAS : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAS, &fields->f_LRAS); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAS, (unsigned long *) (& fields->f_LRAS)); break; case FRV_OPERAND_TLBPRL : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_TLBPRL, &fields->f_TLBPRL); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_TLBPRL, (unsigned long *) (& fields->f_TLBPRL)); break; case FRV_OPERAND_TLBPROPX : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_TLBPROPX, &fields->f_TLBPRopx); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_TLBPROPX, (unsigned long *) (& fields->f_TLBPRopx)); break; case FRV_OPERAND_AE : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_AE, &fields->f_ae); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_AE, (unsigned long *) (& fields->f_ae)); break; case FRV_OPERAND_CALLANN : - errmsg = parse_call_annotation (cd, strp, FRV_OPERAND_CALLANN, &fields->f_reloc_ann); + errmsg = parse_call_annotation (cd, strp, FRV_OPERAND_CALLANN, (unsigned long *) (& fields->f_reloc_ann)); break; case FRV_OPERAND_CCOND : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_CCOND, &fields->f_ccond); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_CCOND, (unsigned long *) (& fields->f_ccond)); break; case FRV_OPERAND_COND : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_COND, &fields->f_cond); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_COND, (unsigned long *) (& fields->f_cond)); break; case FRV_OPERAND_D12 : - errmsg = parse_d12 (cd, strp, FRV_OPERAND_D12, &fields->f_d12); + errmsg = parse_d12 (cd, strp, FRV_OPERAND_D12, (long *) (& fields->f_d12)); break; case FRV_OPERAND_DEBUG : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_DEBUG, &fields->f_debug); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_DEBUG, (unsigned long *) (& fields->f_debug)); break; case FRV_OPERAND_EIR : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_EIR, &fields->f_eir); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_EIR, (unsigned long *) (& fields->f_eir)); break; case FRV_OPERAND_HINT : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_HINT, &fields->f_hint); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_HINT, (unsigned long *) (& fields->f_hint)); break; case FRV_OPERAND_HINT_NOT_TAKEN : errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_h_hint_not_taken, & fields->f_hint); @@ -1242,55 +1242,55 @@ frv_cgen_parse_operand (cd, opindex, strp, fields) } break; case FRV_OPERAND_LDANN : - errmsg = parse_ld_annotation (cd, strp, FRV_OPERAND_LDANN, &fields->f_reloc_ann); + errmsg = parse_ld_annotation (cd, strp, FRV_OPERAND_LDANN, (unsigned long *) (& fields->f_reloc_ann)); break; case FRV_OPERAND_LDDANN : - errmsg = parse_ldd_annotation (cd, strp, FRV_OPERAND_LDDANN, &fields->f_reloc_ann); + errmsg = parse_ldd_annotation (cd, strp, FRV_OPERAND_LDDANN, (unsigned long *) (& fields->f_reloc_ann)); break; case FRV_OPERAND_LOCK : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LOCK, &fields->f_lock); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LOCK, (unsigned long *) (& fields->f_lock)); break; case FRV_OPERAND_PACK : errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_h_pack, & fields->f_pack); break; case FRV_OPERAND_S10 : - errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S10, &fields->f_s10); + errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S10, (long *) (& fields->f_s10)); break; case FRV_OPERAND_S12 : - errmsg = parse_s12 (cd, strp, FRV_OPERAND_S12, &fields->f_d12); + errmsg = parse_s12 (cd, strp, FRV_OPERAND_S12, (long *) (& fields->f_d12)); break; case FRV_OPERAND_S16 : - errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S16, &fields->f_s16); + errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S16, (long *) (& fields->f_s16)); break; case FRV_OPERAND_S5 : - errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S5, &fields->f_s5); + errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S5, (long *) (& fields->f_s5)); break; case FRV_OPERAND_S6 : - errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S6, &fields->f_s6); + errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S6, (long *) (& fields->f_s6)); break; case FRV_OPERAND_S6_1 : - errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S6_1, &fields->f_s6_1); + errmsg = cgen_parse_signed_integer (cd, strp, FRV_OPERAND_S6_1, (long *) (& fields->f_s6_1)); break; case FRV_OPERAND_SLO16 : - errmsg = parse_uslo16 (cd, strp, FRV_OPERAND_SLO16, &fields->f_s16); + errmsg = parse_uslo16 (cd, strp, FRV_OPERAND_SLO16, (long *) (& fields->f_s16)); break; case FRV_OPERAND_SPR : errmsg = parse_spr (cd, strp, & frv_cgen_opval_spr_names, & fields->f_spr); break; case FRV_OPERAND_U12 : - errmsg = parse_u12 (cd, strp, FRV_OPERAND_U12, &fields->f_u12); + errmsg = parse_u12 (cd, strp, FRV_OPERAND_U12, (long *) (& fields->f_u12)); break; case FRV_OPERAND_U16 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_U16, &fields->f_u16); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_U16, (unsigned long *) (& fields->f_u16)); break; case FRV_OPERAND_U6 : - errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_U6, &fields->f_u6); + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_U6, (unsigned long *) (& fields->f_u6)); break; case FRV_OPERAND_UHI16 : - errmsg = parse_uhi16 (cd, strp, FRV_OPERAND_UHI16, &fields->f_u16); + errmsg = parse_uhi16 (cd, strp, FRV_OPERAND_UHI16, (unsigned long *) (& fields->f_u16)); break; case FRV_OPERAND_ULO16 : - errmsg = parse_ulo16 (cd, strp, FRV_OPERAND_ULO16, &fields->f_u16); + errmsg = parse_ulo16 (cd, strp, FRV_OPERAND_ULO16, (unsigned long *) (& fields->f_u16)); break; default : diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index 6c94a65f5e4..7b06ea33ed4 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -549,7 +549,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -579,7 +579,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -603,7 +603,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -687,7 +687,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/ia64-opc.c b/opcodes/ia64-opc.c index fc90213a6b5..f76aa7fb8bd 100644 --- a/opcodes/ia64-opc.c +++ b/opcodes/ia64-opc.c @@ -365,7 +365,7 @@ locate_opcode_ent (ia64_insn opcode, enum ia64_insn_type type) unsigned int op; int currbitnum = bitpos[currstatenum]; int oplen; - int opval[3]; + int opval[3] = {0}; int next_op; int currbit; diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c index a0204d03233..c5a318767f8 100644 --- a/opcodes/ip2k-asm.c +++ b/opcodes/ip2k-asm.c @@ -50,13 +50,15 @@ static const char * parse_insn_normal /* -- asm.c */ #define PARSE_FUNC_DECL(name) \ -static const char *name PARAMS ((CGEN_CPU_DESC, const char **, int, long *)) + static const char *name (CGEN_CPU_DESC, const char **, int, long *) +#define PARSE_UFUNC_DECL(name) \ + static const char *name (CGEN_CPU_DESC, const char **, int, unsigned long *) -PARSE_FUNC_DECL (parse_fr); -PARSE_FUNC_DECL (parse_addr16); -PARSE_FUNC_DECL (parse_addr16_cjp); +PARSE_UFUNC_DECL (parse_fr); +PARSE_UFUNC_DECL (parse_addr16); +PARSE_UFUNC_DECL (parse_addr16_cjp); PARSE_FUNC_DECL (parse_lit8); -PARSE_FUNC_DECL (parse_bit3); +PARSE_UFUNC_DECL (parse_bit3); static const char * @@ -64,7 +66,7 @@ parse_fr (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { const char *errmsg; const char *old_strp; @@ -77,47 +79,41 @@ parse_fr (cd, strp, opindex, valuep) old_strp = *strp; afteroffset = NULL; - - /* Check here to see if you're about to try parsing a w as the first arg */ - /* and return an error if you are. */ - if ( (strncmp(*strp,"w",1)==0) || (strncmp(*strp,"W",1)==0) ) + /* Check here to see if you're about to try parsing a w as the first arg + and return an error if you are. */ + if ((strncmp (*strp, "w", 1) == 0) || (strncmp (*strp, "W", 1) == 0)) { (*strp)++; - if ( (strncmp(*strp,",",1)==0) || ISSPACE(**strp) ) + if ((strncmp (*strp, ",", 1) == 0) || ISSPACE (**strp)) { - /* We've been passed a w. Return with an error message so that */ - /* cgen will try the next parsing option. */ + /* We've been passed a w. Return with an error message so that + cgen will try the next parsing option. */ errmsg = _("W keyword invalid in FR operand slot."); return errmsg; } *strp = old_strp; } - /* Attempt parse as register keyword. */ - /* old_strp = *strp; */ - errmsg = cgen_parse_keyword (cd, strp, & ip2k_cgen_opval_register_names, - valuep); - if ( *strp != NULL ) - if (errmsg == NULL) - return errmsg; + (long *) valuep); + if (*strp != NULL + && errmsg == NULL) + return errmsg; - /* Attempt to parse for "(IP)" */ - afteroffset = strstr(*strp,"(IP)"); + /* Attempt to parse for "(IP)". */ + afteroffset = strstr (*strp, "(IP)"); - if ( afteroffset == NULL) - { - /* Make sure it's not in lower case */ - afteroffset = strstr(*strp,"(ip)"); - } + if (afteroffset == NULL) + /* Make sure it's not in lower case. */ + afteroffset = strstr (*strp, "(ip)"); - if ( afteroffset != NULL ) + if (afteroffset != NULL) { - if ( afteroffset != *strp ) + if (afteroffset != *strp) { - /* Invalid offset present.*/ + /* Invalid offset present. */ errmsg = _("offset(IP) is not a valid form"); return errmsg; } @@ -130,47 +126,42 @@ parse_fr (cd, strp, opindex, valuep) } } - /* Attempt to parse for DP. ex: mov w, offset(DP) */ - /* mov offset(DP),w */ - - /* Try parsing it as an address and see what comes back */ + /* Attempt to parse for DP. ex: mov w, offset(DP) + mov offset(DP),w */ - afteroffset = strstr(*strp,"(DP)"); + /* Try parsing it as an address and see what comes back. */ + afteroffset = strstr (*strp, "(DP)"); - if ( afteroffset == NULL) - { - /* Maybe it's in lower case */ - afteroffset = strstr(*strp,"(dp)"); - } + if (afteroffset == NULL) + /* Maybe it's in lower case. */ + afteroffset = strstr (*strp, "(dp)"); - if ( afteroffset != NULL ) + if (afteroffset != NULL) { - if ( afteroffset == *strp ) + if (afteroffset == *strp) { - /* No offset present. Use 0 by default. */ + /* No offset present. Use 0 by default. */ tempvalue = 0; errmsg = NULL; } else - { - errmsg = cgen_parse_address (cd, strp, opindex, - BFD_RELOC_IP2K_FR_OFFSET, - & result_type, & tempvalue); - } + errmsg = cgen_parse_address (cd, strp, opindex, + BFD_RELOC_IP2K_FR_OFFSET, + & result_type, & tempvalue); if (errmsg == NULL) { if (tempvalue <= 127) { - /* Value is ok. Fix up the first 2 bits and return */ + /* Value is ok. Fix up the first 2 bits and return. */ *valuep = 0x0100 | tempvalue; - *strp += 4; /* skip over the (DP) in *strp */ + *strp += 4; /* skip over the (DP) in *strp. */ return errmsg; } else { /* Found something there in front of (DP) but it's out - of range. */ + of range. */ errmsg = _("(DP) offset out of range."); return errmsg; } @@ -178,54 +169,47 @@ parse_fr (cd, strp, opindex, valuep) } - /* Attempt to parse for SP. ex: mov w, offset(SP) */ - /* mov offset(SP), w */ - - - afteroffset = strstr(*strp,"(SP)"); + /* Attempt to parse for SP. ex: mov w, offset(SP) + mov offset(SP), w. */ + afteroffset = strstr (*strp, "(SP)"); if (afteroffset == NULL) - { - /* Maybe it's in lower case. */ - afteroffset = strstr(*strp, "(sp)"); - } + /* Maybe it's in lower case. */ + afteroffset = strstr (*strp, "(sp)"); - if ( afteroffset != NULL ) + if (afteroffset != NULL) { - if ( afteroffset == *strp ) + if (afteroffset == *strp) { - /* No offset present. Use 0 by default. */ + /* No offset present. Use 0 by default. */ tempvalue = 0; errmsg = NULL; } else - { - errmsg = cgen_parse_address (cd, strp, opindex, - BFD_RELOC_IP2K_FR_OFFSET, - & result_type, & tempvalue); - } + errmsg = cgen_parse_address (cd, strp, opindex, + BFD_RELOC_IP2K_FR_OFFSET, + & result_type, & tempvalue); + if (errmsg == NULL) { if (tempvalue <= 127) { - /* Value is ok. Fix up the first 2 bits and return */ + /* Value is ok. Fix up the first 2 bits and return. */ *valuep = 0x0180 | tempvalue; - *strp += 4; /* skip over the (SP) in *strp */ + *strp += 4; /* skip over the (SP) in *strp. */ return errmsg; } else { /* Found something there in front of (SP) but it's out - of range. */ + of range. */ errmsg = _("(SP) offset out of range."); return errmsg; } - } } - - /* Attempt to parse as an address. */ + /* Attempt to parse as an address. */ *strp = old_strp; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IP2K_FR9, & result_type, & value); @@ -233,14 +217,12 @@ parse_fr (cd, strp, opindex, valuep) { *valuep = value; - /* if a parenthesis is found, warn about invalid form */ - + /* if a parenthesis is found, warn about invalid form. */ if (**strp == '(') - { - errmsg = _("illegal use of parentheses"); - } + errmsg = _("illegal use of parentheses"); + /* if a numeric value is specified, ensure that it is between - 1 and 255 */ + 1 and 255. */ else if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { if (value < 0x1 || value > 0xff) @@ -255,16 +237,16 @@ parse_addr16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { const char *errmsg; enum cgen_parse_operand_result result_type; bfd_reloc_code_real_type code = BFD_RELOC_NONE; bfd_vma value; - if ( opindex == (CGEN_OPERAND_TYPE)IP2K_OPERAND_ADDR16H ) + if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16H) code = BFD_RELOC_IP2K_HI8DATA; - else if ( opindex == (CGEN_OPERAND_TYPE)IP2K_OPERAND_ADDR16L ) + else if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16L) code = BFD_RELOC_IP2K_LO8DATA; else { @@ -278,10 +260,10 @@ parse_addr16 (cd, strp, opindex, valuep) if (errmsg == NULL) { /* We either have a relocation or a number now. */ - if ( result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER ) + if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { /* We got a number back. */ - if ( code == BFD_RELOC_IP2K_HI8DATA ) + if (code == BFD_RELOC_IP2K_HI8DATA) value >>= 8; else /* code = BFD_RELOC_IP2K_LOW8DATA */ value &= 0x00FF; @@ -298,35 +280,35 @@ parse_addr16_cjp (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { const char *errmsg; enum cgen_parse_operand_result result_type; bfd_reloc_code_real_type code = BFD_RELOC_NONE; bfd_vma value; - if ( opindex == (CGEN_OPERAND_TYPE)IP2K_OPERAND_ADDR16CJP ) + if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16CJP) code = BFD_RELOC_IP2K_ADDR16CJP; - else if ( opindex == (CGEN_OPERAND_TYPE)IP2K_OPERAND_ADDR16P ) + else if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16P) code = BFD_RELOC_IP2K_PAGE3; errmsg = cgen_parse_address (cd, strp, opindex, code, & result_type, & value); if (errmsg == NULL) { - if ( result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER ) + if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { - if ( (value & 0x1) == 0) /* If the address is even .... */ + if ((value & 0x1) == 0) /* If the address is even .... */ { - if ( opindex == (CGEN_OPERAND_TYPE)IP2K_OPERAND_ADDR16CJP ) + if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16CJP) *valuep = (value >> 1) & 0x1FFF; /* Should mask be 1FFF? */ - else if ( opindex == (CGEN_OPERAND_TYPE)IP2K_OPERAND_ADDR16P ) + else if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16P) *valuep = (value >> 14) & 0x7; } else errmsg = _("Byte address required. - must be even."); } - else if ( result_type == CGEN_PARSE_OPERAND_RESULT_QUEUED ) + else if (result_type == CGEN_PARSE_OPERAND_RESULT_QUEUED) { /* This will happen for things like (s2-s1) where s2 and s1 are labels. */ @@ -413,7 +395,7 @@ parse_bit3 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { const char *errmsg; char mode = 0; @@ -436,13 +418,13 @@ parse_bit3 (cd, strp, opindex, valuep) mode = 2; } - errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep); + errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep); if (errmsg) return errmsg; if (mode) { - value = (unsigned long) *valuep; + value = * valuep; if (value == 0) { errmsg = _("Attempt to find bit index of 0"); @@ -507,40 +489,40 @@ ip2k_cgen_parse_operand (cd, opindex, strp, fields) switch (opindex) { case IP2K_OPERAND_ADDR16CJP : - errmsg = parse_addr16_cjp (cd, strp, IP2K_OPERAND_ADDR16CJP, &fields->f_addr16cjp); + errmsg = parse_addr16_cjp (cd, strp, IP2K_OPERAND_ADDR16CJP, (unsigned long *) (& fields->f_addr16cjp)); break; case IP2K_OPERAND_ADDR16H : - errmsg = parse_addr16 (cd, strp, IP2K_OPERAND_ADDR16H, &fields->f_imm8); + errmsg = parse_addr16 (cd, strp, IP2K_OPERAND_ADDR16H, (unsigned long *) (& fields->f_imm8)); break; case IP2K_OPERAND_ADDR16L : - errmsg = parse_addr16 (cd, strp, IP2K_OPERAND_ADDR16L, &fields->f_imm8); + errmsg = parse_addr16 (cd, strp, IP2K_OPERAND_ADDR16L, (unsigned long *) (& fields->f_imm8)); break; case IP2K_OPERAND_ADDR16P : - errmsg = parse_addr16_cjp (cd, strp, IP2K_OPERAND_ADDR16P, &fields->f_page3); + errmsg = parse_addr16_cjp (cd, strp, IP2K_OPERAND_ADDR16P, (unsigned long *) (& fields->f_page3)); break; case IP2K_OPERAND_BITNO : - errmsg = parse_bit3 (cd, strp, IP2K_OPERAND_BITNO, &fields->f_bitno); + errmsg = parse_bit3 (cd, strp, IP2K_OPERAND_BITNO, (unsigned long *) (& fields->f_bitno)); break; case IP2K_OPERAND_CBIT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_CBIT, &junk); + errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_CBIT, (unsigned long *) (& junk)); break; case IP2K_OPERAND_DCBIT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_DCBIT, &junk); + errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_DCBIT, (unsigned long *) (& junk)); break; case IP2K_OPERAND_FR : - errmsg = parse_fr (cd, strp, IP2K_OPERAND_FR, &fields->f_reg); + errmsg = parse_fr (cd, strp, IP2K_OPERAND_FR, (unsigned long *) (& fields->f_reg)); break; case IP2K_OPERAND_LIT8 : - errmsg = parse_lit8 (cd, strp, IP2K_OPERAND_LIT8, &fields->f_imm8); + errmsg = parse_lit8 (cd, strp, IP2K_OPERAND_LIT8, (long *) (& fields->f_imm8)); break; case IP2K_OPERAND_PABITS : - errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_PABITS, &junk); + errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_PABITS, (unsigned long *) (& junk)); break; case IP2K_OPERAND_RETI3 : - errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_RETI3, &fields->f_reti3); + errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_RETI3, (unsigned long *) (& fields->f_reti3)); break; case IP2K_OPERAND_ZBIT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_ZBIT, &junk); + errmsg = cgen_parse_unsigned_integer (cd, strp, IP2K_OPERAND_ZBIT, (unsigned long *) (& junk)); break; default : diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c index 3abcd952fbe..ee211c67a35 100644 --- a/opcodes/ip2k-dis.c +++ b/opcodes/ip2k-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -452,7 +452,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -482,7 +482,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -506,7 +506,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -590,7 +590,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index 8bd4786129f..38d803a8647 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -53,11 +53,11 @@ static const char * parse_insn_normal static int iq2000_cgen_isa_register PARAMS ((const char **)); static const char * parse_jtargq10 PARAMS ((CGEN_CPU_DESC, const char **, int, int, enum cgen_parse_operand_result *, bfd_vma *)); -static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); +static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); -static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); -static const char * parse_mlo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); +static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_mlo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); /* Special check to ensure that instruction exists for given machine */ int @@ -106,11 +106,11 @@ parse_mimm (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { const char *errmsg; - /* Verify this isn't a register */ + /* Verify this isn't a register. */ if (iq2000_cgen_isa_register (strp)) errmsg = _("immediate value cannot be register"); else @@ -121,6 +121,7 @@ parse_mimm (cd, strp, opindex, valuep) if (errmsg == NULL) { long x = (-value) & 0xFFFF0000; + if (x != 0 && x != (long) 0xFFFF0000) errmsg = _("immediate value out of range"); else @@ -261,7 +262,7 @@ parse_lo16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { if (strncasecmp (*strp, "%lo(", 4) == 0) { @@ -294,7 +295,7 @@ parse_mlo16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - long *valuep; + unsigned long *valuep; { if (strncasecmp (*strp, "%lo(", 4) == 0) { @@ -350,7 +351,7 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) switch (opindex) { case IQ2000_OPERAND__INDEX : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, &fields->f_index); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index)); break; case IQ2000_OPERAND_BASE : errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); @@ -363,40 +364,40 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) } break; case IQ2000_OPERAND_BITNUM : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, &fields->f_rt); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt)); break; case IQ2000_OPERAND_BYTECOUNT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, &fields->f_bytecount); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount)); break; case IQ2000_OPERAND_CAM_Y : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, &fields->f_cam_y); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y)); break; case IQ2000_OPERAND_CAM_Z : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, &fields->f_cam_z); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z)); break; case IQ2000_OPERAND_CM_3FUNC : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, &fields->f_cm_3func); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func)); break; case IQ2000_OPERAND_CM_3Z : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, &fields->f_cm_3z); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z)); break; case IQ2000_OPERAND_CM_4FUNC : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, &fields->f_cm_4func); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func)); break; case IQ2000_OPERAND_CM_4Z : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, &fields->f_cm_4z); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z)); break; case IQ2000_OPERAND_COUNT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, &fields->f_count); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count)); break; case IQ2000_OPERAND_EXECODE : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode)); break; case IQ2000_OPERAND_HI16 : - errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm); + errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_IMM : - errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm); + errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_JMPTARG : { @@ -407,28 +408,29 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) break; case IQ2000_OPERAND_JMPTARGQ10 : { - bfd_vma value; + bfd_vma value = 0; + errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); fields->f_jtargq10 = value; } break; case IQ2000_OPERAND_LO16 : - errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, &fields->f_imm); + errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_MASK : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, &fields->f_mask); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask)); break; case IQ2000_OPERAND_MASKL : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, &fields->f_maskl); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl)); break; case IQ2000_OPERAND_MASKQ10 : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, &fields->f_maskq10); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10)); break; case IQ2000_OPERAND_MASKR : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, &fields->f_rs); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs)); break; case IQ2000_OPERAND_MLO16 : - errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, &fields->f_imm); + errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_OFFSET : { @@ -456,7 +458,7 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs); break; case IQ2000_OPERAND_SHAMT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, &fields->f_shamt); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt)); break; default : diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c index fd731fea757..7ecfeac0089 100644 --- a/opcodes/iq2000-dis.c +++ b/opcodes/iq2000-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -330,7 +330,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -360,7 +360,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -384,7 +384,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -468,7 +468,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index 512e0b95ca3..8cfc5fdd77b 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -49,7 +49,7 @@ static const char * parse_insn_normal /* -- asm.c */ static const char * parse_hash - PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_slo16 @@ -64,7 +64,7 @@ parse_hash (cd, strp, opindex, valuep) CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; const char **strp; int opindex ATTRIBUTE_UNUSED; - unsigned long *valuep ATTRIBUTE_UNUSED; + long *valuep ATTRIBUTE_UNUSED; { if (**strp == '#') ++*strp; @@ -278,25 +278,25 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1); break; case M32R_OPERAND_HASH : - errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk); + errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk)); break; case M32R_OPERAND_HI16 : - errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16); + errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16)); break; case M32R_OPERAND_IMM1 : - errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1); + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1)); break; case M32R_OPERAND_SCR : errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2); break; case M32R_OPERAND_SIMM16 : - errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16); + errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16)); break; case M32R_OPERAND_SIMM8 : - errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8); + errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8)); break; case M32R_OPERAND_SLO16 : - errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16); + errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16)); break; case M32R_OPERAND_SR : errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2); @@ -308,7 +308,7 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2); break; case M32R_OPERAND_UIMM16 : - errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16); + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16)); break; case M32R_OPERAND_UIMM24 : { @@ -318,19 +318,19 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields) } break; case M32R_OPERAND_UIMM3 : - errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, &fields->f_uimm3); + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3)); break; case M32R_OPERAND_UIMM4 : - errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4); + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4)); break; case M32R_OPERAND_UIMM5 : - errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5); + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5)); break; case M32R_OPERAND_UIMM8 : - errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, &fields->f_uimm8); + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8)); break; case M32R_OPERAND_ULO16 : - errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16); + errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16)); break; default : diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 21afb17301d..62ad5447f5f 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -96,12 +96,12 @@ my_print_insn (cd, pc, info) bfd_vma pc; disassemble_info *info; { - char buffer[CGEN_MAX_INSN_SIZE]; - char *buf = buffer; + bfd_byte buffer[CGEN_MAX_INSN_SIZE]; + bfd_byte *buf = buffer; int status; int buflen = (pc & 3) == 0 ? 4 : 2; int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG; - char *x; + bfd_byte *x; /* Read the base part of the insn. */ @@ -401,7 +401,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -431,7 +431,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -455,7 +455,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -539,7 +539,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/openrisc-asm.c b/opcodes/openrisc-asm.c index ad977907d9a..d845876b4b5 100644 --- a/opcodes/openrisc-asm.c +++ b/opcodes/openrisc-asm.c @@ -52,9 +52,9 @@ static const char * parse_insn_normal #define CGEN_VERBOSE_ASSEMBLER_ERRORS static const char * parse_hi16 - PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); static const char * parse_lo16 - PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); long openrisc_sign_extend_16bit (value) @@ -70,7 +70,7 @@ parse_hi16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - unsigned long *valuep; + long *valuep; { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -84,13 +84,7 @@ parse_hi16 (cd, strp, opindex, valuep) bfd_vma value; *strp += 3; -#if 0 - errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep); - if (errmsg != NULL) - fprintf (stderr, "parse_hi: %s\n", errmsg); - if (errmsg != NULL) -#endif - errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, &result_type, &value); if (**strp != ')') return _("missing `)'"); @@ -106,12 +100,14 @@ parse_hi16 (cd, strp, opindex, valuep) if (**strp == '-') { long value; + errmsg = cgen_parse_signed_integer (cd, strp, opindex, &value); ret = value; } else { unsigned long value; + errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, &value); ret = value; } @@ -128,7 +124,7 @@ parse_lo16 (cd, strp, opindex, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - unsigned long *valuep; + long *valuep; { const char *errmsg; enum cgen_parse_operand_result result_type; @@ -142,15 +138,8 @@ parse_lo16 (cd, strp, opindex, valuep) bfd_vma value; *strp += 3; -#if 0 - errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep); - if (errmsg != NULL) - fprintf (stderr, "parse_lo: %s\n", errmsg); - - if (errmsg != NULL) -#endif - errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, - &result_type, &value); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, + &result_type, &value); if (**strp != ')') return _("missing `)'"); @@ -162,12 +151,14 @@ parse_lo16 (cd, strp, opindex, valuep) if (**strp == '-') { long value; + errmsg = cgen_parse_signed_integer (cd, strp, opindex, &value); ret = value; } else { unsigned long value; + errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, &value); ret = value; } @@ -223,16 +214,16 @@ openrisc_cgen_parse_operand (cd, opindex, strp, fields) } break; case OPENRISC_OPERAND_HI16 : - errmsg = parse_hi16 (cd, strp, OPENRISC_OPERAND_HI16, &fields->f_simm16); + errmsg = parse_hi16 (cd, strp, OPENRISC_OPERAND_HI16, (long *) (& fields->f_simm16)); break; case OPENRISC_OPERAND_LO16 : - errmsg = parse_lo16 (cd, strp, OPENRISC_OPERAND_LO16, &fields->f_lo16); + errmsg = parse_lo16 (cd, strp, OPENRISC_OPERAND_LO16, (long *) (& fields->f_lo16)); break; case OPENRISC_OPERAND_OP_F_23 : - errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_OP_F_23, &fields->f_op4); + errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_OP_F_23, (unsigned long *) (& fields->f_op4)); break; case OPENRISC_OPERAND_OP_F_3 : - errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_OP_F_3, &fields->f_op5); + errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_OP_F_3, (unsigned long *) (& fields->f_op5)); break; case OPENRISC_OPERAND_RA : errmsg = cgen_parse_keyword (cd, strp, & openrisc_cgen_opval_h_gr, & fields->f_r2); @@ -244,16 +235,16 @@ openrisc_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & openrisc_cgen_opval_h_gr, & fields->f_r1); break; case OPENRISC_OPERAND_SIMM_16 : - errmsg = cgen_parse_signed_integer (cd, strp, OPENRISC_OPERAND_SIMM_16, &fields->f_simm16); + errmsg = cgen_parse_signed_integer (cd, strp, OPENRISC_OPERAND_SIMM_16, (long *) (& fields->f_simm16)); break; case OPENRISC_OPERAND_UI16NC : - errmsg = parse_lo16 (cd, strp, OPENRISC_OPERAND_UI16NC, &fields->f_i16nc); + errmsg = parse_lo16 (cd, strp, OPENRISC_OPERAND_UI16NC, (long *) (& fields->f_i16nc)); break; case OPENRISC_OPERAND_UIMM_16 : - errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_UIMM_16, &fields->f_uimm16); + errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_UIMM_16, (unsigned long *) (& fields->f_uimm16)); break; case OPENRISC_OPERAND_UIMM_5 : - errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_UIMM_5, &fields->f_uimm5); + errmsg = cgen_parse_unsigned_integer (cd, strp, OPENRISC_OPERAND_UIMM_5, (unsigned long *) (& fields->f_uimm5)); break; default : diff --git a/opcodes/openrisc-dis.c b/opcodes/openrisc-dis.c index a41720cf931..bf98dfe6f8c 100644 --- a/opcodes/openrisc-dis.c +++ b/opcodes/openrisc-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -276,7 +276,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -306,7 +306,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -330,7 +330,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -414,7 +414,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; diff --git a/opcodes/xstormy16-asm.c b/opcodes/xstormy16-asm.c index 618e33b2f07..7e30628296f 100644 --- a/opcodes/xstormy16-asm.c +++ b/opcodes/xstormy16-asm.c @@ -83,7 +83,7 @@ parse_mem8 (cd, strp, opindex, valuep) return _("Bad register name"); } else if (cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, - valuep) == NULL) + (long *) valuep) == NULL) return _("Label conflicts with register name"); else if (strncasecmp (*strp, "rx,", 3) == 0 || strncasecmp (*strp, "rxl,", 3) == 0 @@ -225,7 +225,7 @@ xstormy16_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names, & fields->f_Rs); break; case XSTORMY16_OPERAND_ABS24 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_ABS24, &fields->f_abs24); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_ABS24, (unsigned long *) (& fields->f_abs24)); break; case XSTORMY16_OPERAND_BCOND2 : errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_h_branchcond, & fields->f_op2); @@ -234,46 +234,46 @@ xstormy16_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_h_branchcond, & fields->f_op5); break; case XSTORMY16_OPERAND_HMEM8 : - errmsg = parse_mem8 (cd, strp, XSTORMY16_OPERAND_HMEM8, &fields->f_hmem8); + errmsg = parse_mem8 (cd, strp, XSTORMY16_OPERAND_HMEM8, (unsigned long *) (& fields->f_hmem8)); break; case XSTORMY16_OPERAND_IMM12 : - errmsg = cgen_parse_signed_integer (cd, strp, XSTORMY16_OPERAND_IMM12, &fields->f_imm12); + errmsg = cgen_parse_signed_integer (cd, strp, XSTORMY16_OPERAND_IMM12, (long *) (& fields->f_imm12)); break; case XSTORMY16_OPERAND_IMM16 : - errmsg = parse_immediate16 (cd, strp, XSTORMY16_OPERAND_IMM16, &fields->f_imm16); + errmsg = parse_immediate16 (cd, strp, XSTORMY16_OPERAND_IMM16, (unsigned long *) (& fields->f_imm16)); break; case XSTORMY16_OPERAND_IMM2 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM2, &fields->f_imm2); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM2, (unsigned long *) (& fields->f_imm2)); break; case XSTORMY16_OPERAND_IMM3 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM3, &fields->f_imm3); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM3, (unsigned long *) (& fields->f_imm3)); break; case XSTORMY16_OPERAND_IMM3B : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM3B, &fields->f_imm3b); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM3B, (unsigned long *) (& fields->f_imm3b)); break; case XSTORMY16_OPERAND_IMM4 : - errmsg = parse_small_immediate (cd, strp, XSTORMY16_OPERAND_IMM4, &fields->f_imm4); + errmsg = parse_small_immediate (cd, strp, XSTORMY16_OPERAND_IMM4, (unsigned long *) (& fields->f_imm4)); break; case XSTORMY16_OPERAND_IMM8 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM8, &fields->f_imm8); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_IMM8, (unsigned long *) (& fields->f_imm8)); break; case XSTORMY16_OPERAND_IMM8SMALL : - errmsg = parse_small_immediate (cd, strp, XSTORMY16_OPERAND_IMM8SMALL, &fields->f_imm8); + errmsg = parse_small_immediate (cd, strp, XSTORMY16_OPERAND_IMM8SMALL, (unsigned long *) (& fields->f_imm8)); break; case XSTORMY16_OPERAND_LMEM8 : - errmsg = parse_mem8 (cd, strp, XSTORMY16_OPERAND_LMEM8, &fields->f_lmem8); + errmsg = parse_mem8 (cd, strp, XSTORMY16_OPERAND_LMEM8, (unsigned long *) (& fields->f_lmem8)); break; case XSTORMY16_OPERAND_REL12 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL12, &fields->f_rel12); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL12, (unsigned long *) (& fields->f_rel12)); break; case XSTORMY16_OPERAND_REL12A : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL12A, &fields->f_rel12a); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL12A, (unsigned long *) (& fields->f_rel12a)); break; case XSTORMY16_OPERAND_REL8_2 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL8_2, &fields->f_rel8_2); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL8_2, (unsigned long *) (& fields->f_rel8_2)); break; case XSTORMY16_OPERAND_REL8_4 : - errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL8_4, &fields->f_rel8_4); + errmsg = cgen_parse_unsigned_integer (cd, strp, XSTORMY16_OPERAND_REL8_4, (unsigned long *) (& fields->f_rel8_4)); break; case XSTORMY16_OPERAND_WS2 : errmsg = cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_h_wordsize, & fields->f_op2m); diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c index 7678c007eaf..6f49ccfb6ed 100644 --- a/opcodes/xstormy16-dis.c +++ b/opcodes/xstormy16-dis.c @@ -49,11 +49,11 @@ static void print_keyword static void print_insn_normal (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); static int print_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; static int read_insn - (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); /* -- disassembler routines inserted here */ @@ -309,7 +309,7 @@ static int read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, int buflen, CGEN_EXTRACT_INFO *ex_info, unsigned long *insn_value) @@ -339,7 +339,7 @@ static int print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info, - char *buf, + bfd_byte *buf, unsigned int buflen) { CGEN_INSN_INT insn_value; @@ -363,7 +363,7 @@ print_insn (CGEN_CPU_DESC cd, /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; @@ -447,7 +447,7 @@ print_insn (CGEN_CPU_DESC cd, static int default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; int buflen; int status; |