diff options
| author |   Alan Modra <amodra@gmail.com> | 2013-10-29 16:53:25 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2013-10-30 13:33:15 +1030 |
| commit | f9c6b9078c54ea0f018b673e2ff128e61a0aa666 (patch) | |
| tree | d930fc55471caaf4b267600004868317e1d5e3d0 /elfcpp | |
| parent | linux-tdep.c: Fix "warning: 'siginfo_size' may be used uninitialized..." (diff) | |
| download | binutils-gdb-f9c6b9078c54ea0f018b673e2ff128e61a0aa666.tar.gz binutils-gdb-f9c6b9078c54ea0f018b673e2ff128e61a0aa666.tar.bz2 binutils-gdb-f9c6b9078c54ea0f018b673e2ff128e61a0aa666.zip | |
Report overflow on PowerPC64 @h and @ha relocations.
This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow. The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets. We'd like to know when
such offsets overflow. Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant. Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time. For now, we won't report overflow at assembly
time..
This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.
include/elf/
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
Make all _HA and _HI relocs report signed overflow.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (SEX16): Don't mask.
(REPORT_OVERFLOW_HI): Define as zero.
(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
@tprel@high, and @tprel@higha modifiers.
(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
Handle new relocs.
(md_apply_fix): Similarly.
elfcpp/
* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
(Target_powerpc::Scan::global, local): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Check for overflow
on all ppc64 @h and @ha relocs.
Diffstat (limited to 'elfcpp')
| -rw-r--r-- | elfcpp/ChangeLog | 6 | ||||
| -rw-r--r-- | elfcpp/powerpc.h | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog index 41897fb856d..0c9c0013931 100644 --- a/elfcpp/ChangeLog +++ b/elfcpp/ChangeLog @@ -1,3 +1,9 @@ +2013-10-30 Alan Modra <amodra@gmail.com> + + * powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, + R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, + R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define. + 2013-03-01 Cary Coutant <ccoutant@google.com> * dwarf.h (enum DW_LANG): Adjust spacing for consistency. diff --git a/elfcpp/powerpc.h b/elfcpp/powerpc.h index 2c803af94e3..fb4256bdafe 100644 --- a/elfcpp/powerpc.h +++ b/elfcpp/powerpc.h @@ -164,11 +164,17 @@ enum R_PPC_EMB_SDA21 = 109, R_PPC64_TOCSAVE = 109, R_PPC_EMB_MRKREF = 110, + R_PPC64_ADDR16_HIGH = 110, R_PPC_EMB_RELSEC16 = 111, + R_PPC64_ADDR16_HIGHA = 111, R_PPC_EMB_RELST_LO = 112, + R_PPC64_TPREL16_HIGH = 112, R_PPC_EMB_RELST_HI = 113, + R_PPC64_TPREL16_HIGHA = 113, R_PPC_EMB_RELST_HA = 114, + R_PPC64_DTPREL16_HIGH = 114, R_PPC_EMB_BIT_FLD = 115, + R_PPC64_DTPREL16_HIGHA = 115, R_PPC_EMB_RELSDA = 116, R_PPC_VLE_REL8 = 216, |